Synthesis Report for 'hls_strmtest2'

General Information

Performance Estimates

• Timing (ns)
  
  
  • Summary
    
    

    Clock	Target	Estimated	Uncertainty
    ap_clk	10.00	6.88	1.25

• Latency (clock cycles)
  
  
  • Summary
    
    

    Latency		Interval		Type
    min	max	min	max
    0	0	1	1	none

  • Detail
    
    
    • Instance
      
      

      N/A

    • Loop
      
      

      N/A

Utilization Estimates

• Summary
  
  

  Name	BRAM_18K	DSP48E	FF	LUT
  Expression	-	-	0	43
  FIFO	-	-	-	-
  Instance	-	-	-	-
  Memory	-	-	-	-
  Multiplexer	-	-	-	1
  Register	-	-	2	-
  Total	0	0	2	44
  Available	270	240	126800	63400
  Utilization (%)	0	0	~0	~0

• Detail
  
  
  • Instance
    
    

    N/A

  • Memory
    
    

    N/A

  • FIFO
    
    

    N/A

  • Expression
    
    

    Variable Name	Operation	DSP48E	FF	LUT	Bitwidth P0	Bitwidth P1
    c1_fu_73_p2	+	0	0	8	8	8
    tmp_5_fu_85_p2	+	0	0	8	8	6
    c1_2_fu_91_p3	Select	0	0	8	1	8
    ost_TDATA	Select	0	0	8	1	8
    ap_sig_bdd_90	and	0	0	1	1	1
    or_cond_fu_67_p2	and	0	0	1	1	1
    tmp_1_fu_55_p2	icmp	0	0	3	8	7
    tmp_2_fu_61_p2	icmp	0	0	3	8	7
    tmp_4_fu_79_p2	icmp	0	0	3	8	7
    Total	9	0	0	43	44	53

  • Multiplexer
    
    

    Name	LUT	Input Size	Bits	Total Bits
    ap_sig_ioackin_ost_TREADY	1	2	1	2
    Total	1	2	1	2

  • Register
    
    

    Name	FF	LUT	Bits	Const Bits
    ap_CS_fsm	1	0	1	0
    ap_reg_ioackin_ost_TREADY	1	0	1	0
    Total	2	0	2	0

Interface

• Summary
  
  

  RTL Ports	Dir	Bits	Protocol	Source Object	C Type
  ap_clk	in	1	ap_ctrl_none	hls_strmtest2	return value
  ap_rst_n	in	1	ap_ctrl_none	hls_strmtest2	return value
  d	in	8	ap_none	d	scalar
  ist_TDATA	in	8	axis	ist	pointer
  ist_TVALID	in	1	axis	ist	pointer
  ist_TREADY	out	1	axis	ist	pointer
  ost_TDATA	out	8	axis	ost	pointer
  ost_TVALID	out	1	axis	ost	pointer
  ost_TREADY	in	1	axis	ost	pointer