立命館大学VLSIセンター / IEEE CAS Kansai Chapter 共催講演会

2026年6月22日（月） 16:30〜17:30

立命館大学 大阪いばらきキャンパス H棟7階 H707

参加無料・事前申込み不要・対面のみ

Integrating Quantum Computing with EDA:

QUBO Approaches to Logic Equivalence Checking and Testing

Chun-Yao Wang

National Tsing Hua University

http://nthucad.cs.nthu.edu.tw/~wcyao/

Abstract:
This talk presents a novel approach to formulate Logic Equivalence Checking (LEC) and Test Pattern Generation (TPG) problems as Quadratic Unconstrained Binary Optimization (QUBO) formulations, allowing them to be solved with quantum algorithms such as Quantum Annealing (QA) and Quantum Approximate Optimization Algorithm (QAOA). We propose an advanced QUBO formulation approach that significantly reduces the qubit, quantum gate and quantum circuit depth requirements, thereby improving the scalability and efficiency of quantum algorithms. To the best of our knowledge, this is the first work that formulates LEC and TPG problems in the QUBO. This work opens up new possibilities for leveraging quantum computing in the domains of verification and testing.
Speaker Biography:
Chun-Yao Wang	Dr. Chun-Yao Wang graduated from Department of Electronics Engineering, National Taipei Institute of Technology (NTIT) in 1994. He then received the Ph. D. degree from the Department of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, in 2002. Since 2003, he has been an Assistant Professor with the Department of Computer Science, National Tsing Hua University, Hsinchu, where he is currently a Distinguished Professor. His research interests include logic synthesis and optimization for VLSI/SoC designs and emerging technologies, hardware optimization for Artificial Intelligent model, and hardware security. One of his research results was nominated as the Best Paper in the 2010 IEEE/ACM Design Automation Conference. He was also the recipients of 2018 IEEE International Symposium on VLSI-DAT Best Paper Award. He was awarded the Distinguished Teaching Award from National Tsing Hua University for three times. In 2009, he was awarded the Excellent Young Electrical Engineer Medal from The Chinese Institute of Electrical Engineering. In 2011, he was granted the Excellent Young Scholar Research Project supported by National Science Council, Taiwan. In 2013, he was awarded the Distinguished Young Scholar Award from The Taiwan IC Design Society. In 2018 and 2025, he was awarded the Distinguished Mentor Award from National Tsing Hua University. In 2020, he was awarded the Distinguished Electrical Engineering Professor Award from The Chinese Institute of Electrical Engineering. In 2023, he was awarded the National Excellent Teacher Award of Ministry of Education (MOE), Taiwan. In 2024, he was awarded K. T. Li Cornerstone Award of Institute of Information & Computing Machinery, Taiwan. He was also awarded Outstanding Information and Communication Technology (ICT) Elite Award, Taiwan, in the same year. His graduate students also won awards in the CAD Contest@ICCAD for 24 times. Especially, the first place award in the CAD Contest@ICCAD 2018, 2022, 2023, 2025. Finally, his graduate students also earned second place, and first place awards in the CADathlon Contest@ICCAD 2024, 2025, respectively.
問い合わせ先: 山下 茂（情報理工学部） ger@fc.ritsumei.ac.jp