Synthesis Report for 'hls_regtest'

General Information

Performance Estimates

• Timing (ns)
  
  
  • Summary
    
    

    Clock	Target	Estimated	Uncertainty
    ap_clk	10.00	7.95	1.25

• Latency (clock cycles)
  
  
  • Summary
    
    

    Latency		Interval		Type
    min	max	min	max
    ?	?	?	?	none

  • Detail
    
    
    • Instance
      
      

      N/A

    • Loop
      
      

      Loop Name	Latency		Iteration Latency	Initiation Interval		Trip Count	Pipelined
      	min	max		achieved	target
      - Loop 1	?	?	2	-	-	?	no

Utilization Estimates

• Summary
  
  

  Name	BRAM_18K	DSP48E	FF	LUT
  Expression	-	-	0	107
  FIFO	-	-	-	-
  Instance	-	-	-	-
  Memory	-	-	-	-
  Multiplexer	-	-	-	73
  Register	-	-	132	-
  Total	0	0	132	180
  Available	270	240	126800	63400
  Utilization (%)	0	0	~0	~0

• Detail
  
  
  • Instance
    
    

    N/A

  • Memory
    
    

    N/A

  • FIFO
    
    

    N/A

  • Expression
    
    

    Variable Name	Operation	DSP48E	FF	LUT	Bitwidth P0	Bitwidth P1
    counter_1_fu_129_p2	+	0	0	32	32	1
    tmp_1_fu_103_p2	+	0	0	8	8	8
    counter_0_s_fu_135_p3	Select	0	0	32	1	32
    newSel4_fu_214_p3	Select	0	0	8	1	2
    newSel6_fu_222_p3	Select	0	0	8	1	8
    sel_tmp2_fu_186_p2	and	0	0	1	1	1
    tmp_5_fu_123_p2	icmp	0	0	3	8	1
    tmp_7_fu_162_p2	icmp	0	0	3	8	4
    tmp_8_fu_168_p2	icmp	0	0	3	8	5
    tmp_9_fu_174_p2	icmp	0	0	3	8	3
    not_sel_tmp2_fu_198_p2	or	0	0	1	1	1
    or_cond_fu_208_p2	or	0	0	1	1	1
    sel_tmp1_fu_180_p2	xor	0	0	2	1	2
    tmp_8_not_fu_192_p2	xor	0	0	2	1	2
    Total	14	0	0	107	80	71

  • Multiplexer
    
    

    Name	LUT	Input Size	Bits	Total Bits
    ap_NS_fsm	1	5	1	5
    counter_reg_76	32	2	32	64
    hex_1_data_in	32	3	32	96
    run_reg_87	8	2	8	16
    Total	73	12	73	181

  • Register
    
    

    Name	FF	LUT	Bits	Const Bits
    ap_CS_fsm	4	0	4	0
    btn_0_data_reg	8	0	8	0
    btn_0_vld_reg	0	0	1	1
    counter_0_s_reg_243	32	0	32	0
    counter_reg_76	32	0	32	0
    hex_1_data_reg	32	0	32	0
    hex_1_vld_reg	0	0	1	1
    run_reg_87	8	0	8	0
    sum	8	0	8	0
    tmp_1_reg_235	8	0	8	0
    Total	132	0	134	2

Interface

• Summary
  
  

  RTL Ports	Dir	Bits	Protocol	Source Object	C Type
  ap_clk	in	1	ap_ctrl_hs	hls_regtest	return value
  ap_rst_n	in	1	ap_ctrl_hs	hls_regtest	return value
  ap_start	in	1	ap_ctrl_hs	hls_regtest	return value
  ap_done	out	1	ap_ctrl_hs	hls_regtest	return value
  ap_idle	out	1	ap_ctrl_hs	hls_regtest	return value
  ap_ready	out	1	ap_ctrl_hs	hls_regtest	return value
  ap_return	out	8	ap_ctrl_hs	hls_regtest	return value
  idata	in	8	ap_none	idata	scalar
  btn	in	8	ap_none	btn	pointer
  hex	out	32	ap_none	hex	pointer