/*
				(C) Oct. 2025, T.IZUMI@Ritsumeikan

 */

#include "xparameters.h" // System parameter definitions
#include "xgpiops.h"     // for PS GPIO(MIO)
#include "xgpio.h"       // for PL GPIO
#include "xil_types.h"
#include "xil_printf.h"
#include "stdlib.h"

#define LD_MIO7 7
#define BTN_MIO50 50
#define BTN_MIO51 51

#define DELAYLOOP 0x80000

u32 *gpio01=(u32 *)(XPAR_AXI_GPIO_0_BASEADDR+XGPIO_DATA_OFFSET);
u32 *gpio02=(u32 *)(XPAR_AXI_GPIO_0_BASEADDR+XGPIO_DATA2_OFFSET);

static XGpioPs gpiops;

int main(){
  // Local variables
  XGpioPs_Config* gpiops_cfg_ptr;
  int counter=0;
  int run, r, i;
  u32 ld, pb50, pb51, val01i, val01o;

  xil_printf("\r\n\r\n");
  xil_printf("Device: %s\r\n", XPAR_DEVICE_ID);
  xil_printf("ZyboTest/testgpio.c, compiled at %s\r\n",__TIMESTAMP__);
  xil_printf("\r\n\r\n");

  gpiops_cfg_ptr=XGpioPs_LookupConfig(XPAR_XGPIOPS_0_BASEADDR);
  r=XGpioPs_CfgInitialize(&gpiops,gpiops_cfg_ptr,gpiops_cfg_ptr->BaseAddr);
  if(r!=XST_SUCCESS) {
    xil_printf( "GPIOps Init Err\r\n");
    exit(-1);
  }
  XGpioPs_SetDirectionPin   (&gpiops,LD_MIO7  ,1);
  XGpioPs_SetDirectionPin   (&gpiops,BTN_MIO50,0);
  XGpioPs_SetDirectionPin   (&gpiops,BTN_MIO51,0);
  XGpioPs_SetOutputEnablePin(&gpiops,LD_MIO7  ,1);
  XGpioPs_SetOutputEnablePin(&gpiops,BTN_MIO50,0);
  XGpioPs_SetOutputEnablePin(&gpiops,BTN_MIO51,0);

  run=1;
  while (run) {
    for (i=0;i<DELAYLOOP;i++) {
      pb50=XGpioPs_ReadPin(&gpiops,BTN_MIO50); // read BTN MIO50
      pb51=XGpioPs_ReadPin(&gpiops,BTN_MIO51); // read BTN MIO51
      val01i=*gpio01; // read SW[3:0] & BTN[3:0]
      val01o=(pb51?8:0)|(pb50?4:0)|(counter&3);
      *gpio01=val01o; // write LD[3:0]
      ld=(val01i&15)?1:0;
      XGpioPs_WritePin(&gpiops,LD_MIO7,ld); // write LD MIO07
      if (pb50!=0 && pb51!=0) run=0;
      *gpio02=counter;
    }
    xil_printf("pb50=%x pb51=%x gpi01=%08x gpi02=%08x\r\n",
	       pb50,pb51,*gpio01,*gpio02);
    counter++;
  }

  xil_printf("Finished.\r\n");

  return 0;
}